1. Field of the Invention
This invention relates to attenuation of clock jitter in a token-ring network, and more particularly to a digital jitter attenuator and auto-centered elastic buffer using phase selection.
2. Description of the Related Art
In synchronous transmission systems such as the Bell T1 carrier system and the Token-Ring local-area network, the clock is encoded with the data using well-known methods such as differential Manchester coding or alternate mark inversion (AMI). A receiving station will extract the clock from the coded dam stream and provide this extracted receive clock and the data itself. The extracted receive clock is used to retransmit the data to the next station. When the stations are arranged in a ring topology, any distortion of the clock will be passed along from station to station, or clock distortion may even be amplified by each station.
The transmission media between the stations is non-ideal, acting as a low-pass filter. Sequences of the coded data stream having relatively denser transitions will appear as a higher-frequency portion of the data stream while other sequences of coded data having a lower density of transitions will appear as a lower-frequency portion of the data stream. The higher-frequency portions will tend to travel through the media in a shorter time than the lower-frequency portions. Thus the higher-frequency portions will appear to be shifted to an earlier time or phase relative to the lower-frequency portions. This phase shift of the higher-frequency portions of the coded dam stream causes the clock extracted to also be phase-shifted during the time that the higher-frequency portions of the coded data stream are being received. This is one source of clock jitter.
Extraction and use of the phase-shifted clock will cause the re-transmitted data to also be phase shifted. The high-frequency portions of the data stream will increase in frequency with each re-transmission, resulting in increased jitter as the data stream is re-transmitted along the ring. Thus the need exists for attenuation of this jitter. The need is especially great in a ring topology where the jitter is amplified by each re-transmitting station.
Jitter can be attenuated by a variety of methods. The jittery receive clock is typically filtered or smoothed out before being used as the transmit clock. An elastic buffer, such as a FIFO, is needed to buffer the difference in rates of receiving at the jittery receive clock's rate and transmitting the data at the smother transmit clock rate. FIG. 1 shows one prior-art approach discussed by J. C. Bellamy in Digital Telephony, pp 327-329, and published by Wiley in 1982. The jittery receive clock 11 is extracted by clock recovery circuit 12 from coded data stream 10. The jittery receive clock 11 is used to write data from the coded data stream 10 into an elastic buffer 14. A storage-level signal 16, such as a half-full flag of elastic buffer 14, is smoothed or filtered by filter 18 and used to control a voltage-controlled oscillator (VCO) 19. The clock outputted from the VCO is used to read data out of the elastic buffer 14, which is combined with the smoothed clock from the VCO to form the transmitted coded data stream using well-known line coding techniques.
The frequency of the smoothed transmit clock from the VCO 19 is varied by the filtered storage-level signal 16. Thus the elastic buffer itself is used to increase the transmit clock frequency when the buffer becomes too full, or decrease the transmit clock frequency when the buffer empties. The feedback loop of the elastic buffer 14, filter 18 and VCO 19 has a lower bandwidth and is less responsive, than the clock recovery circuit 12. Thus the frequency of the transmit clock is smoothed relative to the receive clock, and phase shifts in the receive clock are attenuated. The elastic buffer absorbs the instantaneous difference in frequency between the receive and transmit clocks, and the feedback loop using the storage-level signal 16 of the elastic buffer 14 forces the receive and transmit clocks to have the same average frequency.
FIG. 2 is another prior-an jitter attenuator, described by A. C. Marshall et al. in U.S. Pat. No. 5,090,025, assigned to Proteon, Inc. of Westboro, Mass. The received data from coded data stream 10 is again written into elastic buffer 14 by an extracted receive clock 11 from clock recovery circuit 12. However, the storage level of the elastic buffer is not used. Instead, a phase-locked loop 17 is constructed from VCO 19, filter 18, and phase comparator 15. Phase comparator 15 compares the phase of the extracted receive clock 11 to the phase of the filtered transmit clock 20 outputted from VCO 19. The phase difference is filtered by filter 18 and then used to control VCO 19. Thus the phase difference is used to control the frequency of the filtered transmit clock 20 outputted from VCO 19.
Since no feedback is provided from the elastic buffer 14, the elastic buffer may need to be re-centered, or filled until about half-full. Otherwise, the elastic buffer 14 could fill up (a data over-run) or empty out ( a data under-run), causing a data error.
The VCO 19 is typically an analog circuit using a crystal oscillator. This is undesirable since crystal oscillators are typically not integrated onto an integrated circuit, increasing the cost and size of the system. Power-supply noise rejection is also a problem because the bandwidth of the phase-locked loop 17 or loop in FIG. 1 of the storage-level signal 16, filter 18, and VCO 19 is narrow in order to smooth the jittery receive clock. Tolerances of the analog components, such as capacitors in the filter, are tight and difficult to maintain.
What is desired is a fully-integrated jitter attenuator, one without the external crystal oscillator needed for the voltage-controlled oscillator. It is desired to integrate the jitter attenuator with other digital logic circuits in an integrated circuit (IC). A digital rather than analog implementation is desired to improve power-supply noise rejection, and to eliminate the tolerances needed by the analog components.
It is also desired to have feedback from the elastic buffer so that initialization and re-centering of the elastic buffer is not necessary. It is also desired to have jitter attenuation that may be adjusted in degree.